trunk/c_soc1/c_soc1.tex

%$Header$

\chapter[\csoconeshorttitle{}]{\csoconelongtitle{}}

\label{csoc1}

\beginchapterquote{``Anything is possible if you don't know what you're talking
                     about.''}
                     {Unknown}

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\section{Introduction}
%Section tag: INT0
\label{csoc1:sint0}


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\section{Potentiometers}
%Section tag: pot0
\label{csoc1:spot0}


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\section{Ratiometric Conversion And Measurement Systems}
%Section tag: RCS0
\label{csoc1:srcs0}


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\subsection{Introduction}
%Section tag: INT0
\label{csoc1:srcs0:sint0}


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\subsection{Observation Error Due To A/D Quantization}
%Subsection tag: OEQ0
\label{csoc1:srcs0:soeq0}

\index{quantization error}
The software which executes on a microcontroller is inherently digital
and can accept as input only digital data.  Analog signals must first be
converted to integers using an \index{A/D converter}A/D converter, and
such a conversion always introduces \index{quantization error}quantization
error as a voltage which is conceptually real is mapped to
$\vworkintsetnonneg{}$.  Any such quantization errors are compounded when
more than one quantized value is used to attempt to infer potentiometer 
position.

The chief emphasis of this section is the analysis of error due to the
use of multiple quantized inputs in an attempt to infer a potentiometer
position.


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\subsubsection{Prototype System I}
%Subsubsection tag: OEQ0
\label{csoc1:srcs0:soeq0:spsa0}

In this section we consider the system shown in 
Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}.  
The figure represents
the simplest system which may present quantization
analysis difficulties.  Subsequent sections will analyze
the quantization error of more difficult systems.
Table~\ref{tbl:csoc1:srcs0:soeq0:spsa0:01} defines the
variables used in
Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01} and for
analysis in this section.

\begin{figure}
\centering
\includegraphics[width=4.6in]{c_soc1/prcs001.eps}
\caption{Prototype Ratiometric Conversion System I}
\label{fig:csoc1:srcs0:soeq0:spsa0:01}
\end{figure}

\begin{table}
\begin{center}
\begin{tabular}{|c|l|}
\hline
Variable           & Description \\
\hline
\hline
$\alpha$           & Potentiometer position, parameterized through $0\leq\alpha\leq 1$. \\
                   & $\alpha=0$ is defined to be the potentiometer position \\
                   & that produces the lowest voltage at the A/D pin, and \\
                   & $\alpha=1$ is defined to be the potentiometer position \\
                   & that produces the highest voltage at the A/D pin.    \\
\hline
$\overline{\alpha}$     
                   & The estimate of potentiometer position, which may    \\
                   & contain error because of quantization error introduced \\
                   & by A/D conversion.                                   \\
\hline
$N_{ADP}$          & The number of A/D counts (supplied to software by an \\
                   & A/D converter) corresponding to the sensing of the   \\
                   & potentiometer position $\alpha$.                     \\
\hline
$\overline{N_{ADP}}$          
                   & $N_{ADP}$ with no quantization error.                \\
\hline
$N_{ADS}$          & The number of A/D counts (supplied to software by an \\
                   & A/D converter) corresponding to the sensing of the   \\
                   & supply voltage $V_S$.                                \\
\hline
$\overline{N_{ADS}}$          
                   & $N_{ADS}$ with no quantization error.                \\
\hline
$R_P$              & The resistance (in Ohms) of the variable potentiometer \\
                   & whose wiper position $\alpha$ is to be sensed (see   \\
                   & Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}).  Note that this resistance does not appear \\
                   & in the analysis of the circuit of Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}, as only  \\
                   & the potentiometer wiper position $\alpha$ affects $V_{ADP}$. \\
\hline
$r_{ADP}$          & The A/D converter ratio (from volts to counts)       \\
                   & implemented by A/D converter monitoring the variable \\
                   & potentiometer input.  Note that $N_P = r_{ADP} V_{ADP}$. \\
\hline
$r_{ADS}$          & The A/D converter ratio (from volts to counts)       \\
                   & implemented by A/D converter monitoring the $V_S$ input. \\
                   & Note that $N_S = r_{ADS} V_{ADS}$.                   \\
\hline
$V_{ADP}$          & The voltage supplied to the microcontroller or A/D   \\
                   & converter corresponding to the variable potentiometer\\
                   & position $\alpha$.  In the system of Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}, $V_{ADP} = \alpha V_S$.\\
\hline
$V_{ADS}$          & The voltage supplied to the microcontroller or A/D   \\
                   & converter corresponding to supply voltage $V_S$.  In \\
                   & the system of Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}, $V_{ADS}=V_S$.  \\
\hline
$V_S$              & The supply voltage, presumed variable, which can be  \\
                   & sensed by the microcontroller software, and also     \\
                   & drives the high side of the variable potentiometer.  \\
\hline
\end{tabular}
\end{center}
\caption{Variables Used In Analysis Of Prototype System I
         (Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01})}
\label{tbl:csoc1:srcs0:soeq0:spsa0:01}
\end{table}

To analyze the system depicted in Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01},
first note that

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:01}
V_{ADS}  =  V_S
\end{equation}

\noindent{}and

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:02}
V_{ADP}  =  \alpha V_S.
\end{equation}

For simplicity of analysis, we assume that A/D converters quantize by
truncation, so that

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:03}
N_{ADS}  =  \lfloor V_S r_{ADS} \rfloor
\end{equation}

\noindent{}and

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:04}
N_{ADP}  =  \lfloor \alpha V_S r_{ADP} \rfloor.
\end{equation}

\noindent{}The assumption that A/D converters quantize by truncation
has little effect on the error analysis of practical systems.  (Need
to include an exercise to show this.)

To aid in symbolic manipulation, we also introduce
$\overline{N_{ADS}}$ and $\overline{N_{ADP}}$, which are
$N_{ADS}$ and $N_{ADP}$, respectively,
without quantization error:

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:03b}
\overline{N_{ADS}}  =  V_S r_{ADS}
\end{equation}

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:04b}
\overline{N_{ADP}}  =  \alpha V_S r_{ADP}
\end{equation}

If quantization were not present (i.e. if Eqns. 
\ref{eq:csoc1:srcs0:soeq0:spsa0:03}
and 
\ref{eq:csoc1:srcs0:soeq0:spsa0:04}
did not include floor functions), the potentiometer wiper position
$\alpha$ could be calculated exactly as:

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:05}
\alpha = \frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}} r_{ADP}}.
\end{equation}

Based on (\ref{eq:csoc1:srcs0:soeq0:spsa0:05}),
it makes sense to calculate $\overline{\alpha}$, the
estimate of $\alpha$, as:

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:05b}
\overline{\alpha} 
= 
\frac{N_{ADP} r_{ADS}}{N_{ADS} r_{ADP}}.
\end{equation}

The question that must be posed is:
\emph{How different from $\alpha$ can $\overline{\alpha}$ be?}.
We seek to bound $|\overline{\alpha}-\alpha|$.

Quantization can be treated by noting that applying the floor function
to an input introduces an error $\in (-1,0]$, i.e.

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:06}
\lfloor x \rfloor = x + \varepsilon; \;\; \varepsilon \in  (-1,0].
\end{equation}

Using this observation, we can rewrite
(\ref{eq:csoc1:srcs0:soeq0:spsa0:05b}) as

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:07}
\overline{\alpha} 
= 
\frac{N_{ADP} r_{ADS}}{N_{ADS} r_{ADP}}
=
\frac{(\overline{N_{ADP}} + \varepsilon_1) r_{ADS}}{(\overline{N_{ADS}} + \varepsilon_2) r_{ADP}} ;
\;\;
\varepsilon_1, \varepsilon_2 \in (-1, 0].
\end{equation}

\noindent{}It can be seen from
(\ref{eq:csoc1:srcs0:soeq0:spsa0:07})
that the minimum value of the estimate 
$\overline{\alpha}$ occurs when $\varepsilon_1$ is minimized and 
$\varepsilon_2$ is maximized.  Similarly, the maximum 
value occurs when $\varepsilon_1$ is maximized and 
$\varepsilon_2$ is minimized.  These observations lead to this
inequality:

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:08}
\frac{N_{ADP} r_{ADS}}{(N_{ADS}+1) r_{ADP}}
<
\alpha
<
\frac{(N_{ADP}+1) r_{ADS}}{r_{ADP}} .
\end{equation}

Intuitively, the form of (\ref{eq:csoc1:srcs0:soeq0:spsa0:08})
makes sense.  The smallest possible value of $\alpha$ will correspond
to the case
when $N_{ADP}$ contains no quantization error but $N_{ADS}$ contains
a quantization error of nearly 1.
The largest possible value of $\alpha$ will correspond
to the case
when $N_{ADS}$ contains no quantization error but $N_{ADP}$ contains
a quantization error of nearly 1.

It can also be seen from (\ref{eq:csoc1:srcs0:soeq0:spsa0:08}) that
the interval to which $\alpha$ is confined will be larger
when $V_S$ is smaller (implying a smaller $N_{ADS}$ and $N_{ADP}$).
This is also intuitively plausible, since the quantization error 
of up to one count in $N_{ADS}$ or $N_{ADP}$ will have a larger
relative significance when $N_{ADS}$ and $N_{ADP}$ are smaller.

The inequality provided in (\ref{eq:csoc1:srcs0:soeq0:spsa0:08})
is certainly useful, and gives insight into quantization error.  However,
we seek an inequality that is more friendly to engineering work, i.e.
one that involves voltages rather than A/D counts.

Assume it is known for an application that $V_S$ can vary only over the
interval

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:08b}
V_S \in [V_{SMIN}, V_{SMAX}], 
\end{equation}


\noindent{}and that $\alpha$ can very only over
the interval 

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:08c}
\alpha \in [\alpha_{MIN}, \alpha_{MAX}].
\end{equation}

\noindent{}Furthermore, we
seek useful inequalities where is it \emph{not} required 
that\footnote{(\ref{eq:csoc1:srcs0:soeq0:spsa0:09}) represents the 
requirement that $V_{SMIN}$ or $V_{SMAX}$ represent a precisely 
integral number of A/D
counts.  This requirement is almost never met in practical engineering
work.}

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:09}
r_{ADS} \vworkdivides \{V_{SMIN},V_{SMAX}\},
\end{equation}

\noindent{}as if (\ref{eq:csoc1:srcs0:soeq0:spsa0:09})
were required, it would introduce extra complexity 
in applying the inequality.

To develop the desired type of inequality, we can use
a different analysis method.  Assume that 
$r_{ADS}$ and $r_{ADP}$ are fixed.  Then, introduce
the function

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:10}
F(\overline{N_{ADP}}, \overline{N_{ADS}}) 
= 
\frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}} r_{ADP}},
\end{equation}

\noindent{}which, in accordance with (\ref{eq:csoc1:srcs0:soeq0:spsa0:05}),
is a perfect estimate of $\alpha$.

\begin{figure}
\centering
\Huge{TBD}
\caption{Sample Staircase Pattern Of Estimate $\overline{\alpha}$ Of
         Prototype Ratiometric Conversion System I}
\label{fig:csoc1:srcs0:soeq0:spsa0:02}
\end{figure}

We can examine the staircase pattern of $\overline{\alpha}$ as 
$V_S$ is increased (see Figure \ref{fig:csoc1:srcs0:soeq0:spsa0:02},
which provides an example staircase pattern).  Note that the staircase
pattern may contain four qualitatively
distinct types of vertical discontinuities.  In the descriptions below,
assume that $V_D \in [V_{SMIN}, V_{SMAX}]$ is the value of
$V_S$ at the discontinuity.

\begin{itemize}
\item \textbf{Downward overshoot discontinuities (DOD):}
      As $V_S$ is increased, these correspond to the values
      of $V_S$ where $V_S r_{ADS} \in \vworkintset$ but
      $V_S \alpha r_{ADS} \notin \vworkintset$.  At such 
      discontinuities, 
      $\lim_{V_S \rightarrow V_D^-}\overline{\alpha} > \alpha$,
      but 
      $\lim_{V_S \rightarrow V_D^+}\overline{\alpha} < \alpha$.
\item \textbf{Upward overshoot discontinuities (UOD):}
      As $V_S$ is increased, these correspond to the values
      of $V_S$ where $V_S r_{ADS} \notin \vworkintset$ but
      $V_S \alpha r_{ADS} \in \vworkintset$.  At such 
      discontinuities, 
      $\lim_{V_S \rightarrow V_D^-}\overline{\alpha} < \alpha$,
      but 
      $\lim_{V_S \rightarrow V_D^+}\overline{\alpha} > \alpha$.
\item \textbf{Downward exact discontinuities (DED):}
      As $V_S$ is increased, these correspond to the values
      of $V_S$ where $V_S r_{ADS} \in \vworkintset$ and
      $V_S \alpha r_{ADS} \in \vworkintset$.  At such 
      discontinuities, 
      $\lim_{V_S \rightarrow V_D^-}\overline{\alpha} > \alpha$,
      but 
      $\lim_{V_S \rightarrow V_D^+}\overline{\alpha} = \alpha$.
\item \textbf{Upward exact discontinuities (UED):}
      As $V_S$ is increased, these correspond to the values
      of $V_S$ where $V_S r_{ADS} \in \vworkintset$ and
      $V_S \alpha r_{ADS} \in \vworkintset$.  At such 
      discontinuities, 
      $\lim_{V_S \rightarrow V_D^-}\overline{\alpha} < \alpha$,
      but 
      $\lim_{V_S \rightarrow V_D^+}\overline{\alpha} = \alpha$.
\end{itemize}

We can place upper bounds on the magnitudes of the discontinuities
by examining the partial derivatives of
$F(\overline{N_{ADP}}, \overline{N_{ADS}})$ as specified in
(\ref{eq:csoc1:srcs0:soeq0:spsa0:10}), specifically:

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:11}
\frac{\partial{}F(\cdot{},\cdot{})}{\partial \overline{N_{ADS}}}
= 
-
\frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}^2} r_{ADP}}
\end{equation}

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:11b}
\frac{\partial{}^2 F(\cdot{},\cdot{})}{\partial \overline{N_{ADS}}^2}
= 
2
\frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}^3} r_{ADP}}
\end{equation}

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:11c}
\frac{\partial{}^i F(\cdot{},\cdot{})}{\partial \overline{N_{ADS}}^i}
= 
(-1)^i (i!)
\frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}^{i+1}} r_{ADP}}
\end{equation}


\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:12}
\frac{\partial{}F(\cdot{},\cdot{})}{\partial \overline{N_{ADP}}}
= 
-
\frac{r_{ADS}}{\overline{N_{ADS}} r_{ADP}}
\end{equation}

\begin{equation}
\label{eq:csoc1:srcs0:soeq0:spsa0:12b}
\frac{\partial{}^i F(\cdot{},\cdot{})}{\partial \overline{N_{ADP}}^i}
= 
0, \; i \geq 2
\end{equation}

A \emph{DOD} (discussed above) corresponds to the case where
$N_{ADS}$ increases by one count at $V_S=V_D$ without an increase in
$N_{ADP}$.    


A \emph{UOD} (discussed above) corresponds to the case where
$N_{ADP}$ increases by one count at $V_S=V_D$ without an increase in
$N_{ADS}$.    


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\section{Motion Control Systems}


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$Author: dtashley $
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%End of file C_PCO0.TEX
1	%$Header$
2
3	\chapter[\csoconeshorttitle{}]{\csoconelongtitle{}}
4
5	\label{csoc1}
6
7	\beginchapterquote{``Anything is possible if you don't know what you're talking
8	about.''}
9	{Unknown}
10
11	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
12	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
13	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
14	\section{Introduction}
15	%Section tag: INT0
16	\label{csoc1:sint0}
17
18
19	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
20	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
21	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
22	\section{Potentiometers}
23	%Section tag: pot0
24	\label{csoc1:spot0}
25
26
27	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
28	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
29	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
30	\section{Ratiometric Conversion And Measurement Systems}
31	%Section tag: RCS0
32	\label{csoc1:srcs0}
33
34
35
36	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
37	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
38	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
39	\subsection{Introduction}
40	%Section tag: INT0
41	\label{csoc1:srcs0:sint0}
42
43
44
45
46
47	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
48	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
49	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
50	\subsection{Observation Error Due To A/D Quantization}
51	%Subsection tag: OEQ0
52	\label{csoc1:srcs0:soeq0}
53
54	\index{quantization error}
55	The software which executes on a microcontroller is inherently digital
56	and can accept as input only digital data. Analog signals must first be
57	converted to integers using an \index{A/D converter}A/D converter, and
58	such a conversion always introduces \index{quantization error}quantization
59	error as a voltage which is conceptually real is mapped to
60	$\vworkintsetnonneg{}$. Any such quantization errors are compounded when
61	more than one quantized value is used to attempt to infer potentiometer
62	position.
63
64	The chief emphasis of this section is the analysis of error due to the
65	use of multiple quantized inputs in an attempt to infer a potentiometer
66	position.
67
68
69	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
70	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
71	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
72	\subsubsection{Prototype System I}
73	%Subsubsection tag: OEQ0
74	\label{csoc1:srcs0:soeq0:spsa0}
75
76	In this section we consider the system shown in
77	Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}.
78	The figure represents
79	the simplest system which may present quantization
80	analysis difficulties. Subsequent sections will analyze
81	the quantization error of more difficult systems.
82	Table~\ref{tbl:csoc1:srcs0:soeq0:spsa0:01} defines the
83	variables used in
84	Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01} and for
85	analysis in this section.
86
87	\begin{figure}
88	\centering
89	\includegraphics[width=4.6in]{c_soc1/prcs001.eps}
90	\caption{Prototype Ratiometric Conversion System I}
91	\label{fig:csoc1:srcs0:soeq0:spsa0:01}
92	\end{figure}
93
94	\begin{table}
95	\begin{center}
96	\begin{tabular}{\|c\|l\|}
97	\hline
98	Variable & Description \\
99	\hline
100	\hline
101	$\alpha$ & Potentiometer position, parameterized through $0\leq\alpha\leq 1$. \\
102	& $\alpha=0$ is defined to be the potentiometer position \\
103	& that produces the lowest voltage at the A/D pin, and \\
104	& $\alpha=1$ is defined to be the potentiometer position \\
105	& that produces the highest voltage at the A/D pin. \\
106	\hline
107	$\overline{\alpha}$
108	& The estimate of potentiometer position, which may \\
109	& contain error because of quantization error introduced \\
110	& by A/D conversion. \\
111	\hline
112	$N_{ADP}$ & The number of A/D counts (supplied to software by an \\
113	& A/D converter) corresponding to the sensing of the \\
114	& potentiometer position $\alpha$. \\
115	\hline
116	$\overline{N_{ADP}}$
117	& $N_{ADP}$ with no quantization error. \\
118	\hline
119	$N_{ADS}$ & The number of A/D counts (supplied to software by an \\
120	& A/D converter) corresponding to the sensing of the \\
121	& supply voltage $V_S$. \\
122	\hline
123	$\overline{N_{ADS}}$
124	& $N_{ADS}$ with no quantization error. \\
125	\hline
126	$R_P$ & The resistance (in Ohms) of the variable potentiometer \\
127	& whose wiper position $\alpha$ is to be sensed (see \\
128	& Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}). Note that this resistance does not appear \\
129	& in the analysis of the circuit of Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}, as only \\
130	& the potentiometer wiper position $\alpha$ affects $V_{ADP}$. \\
131	\hline
132	$r_{ADP}$ & The A/D converter ratio (from volts to counts) \\
133	& implemented by A/D converter monitoring the variable \\
134	& potentiometer input. Note that $N_P = r_{ADP} V_{ADP}$. \\
135	\hline
136	$r_{ADS}$ & The A/D converter ratio (from volts to counts) \\
137	& implemented by A/D converter monitoring the $V_S$ input. \\
138	& Note that $N_S = r_{ADS} V_{ADS}$. \\
139	\hline
140	$V_{ADP}$ & The voltage supplied to the microcontroller or A/D \\
141	& converter corresponding to the variable potentiometer\\
142	& position $\alpha$. In the system of Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}, $V_{ADP} = \alpha V_S$.\\
143	\hline
144	$V_{ADS}$ & The voltage supplied to the microcontroller or A/D \\
145	& converter corresponding to supply voltage $V_S$. In \\
146	& the system of Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01}, $V_{ADS}=V_S$. \\
147	\hline
148	$V_S$ & The supply voltage, presumed variable, which can be \\
149	& sensed by the microcontroller software, and also \\
150	& drives the high side of the variable potentiometer. \\
151	\hline
152	\end{tabular}
153	\end{center}
154	\caption{Variables Used In Analysis Of Prototype System I
155	(Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01})}
156	\label{tbl:csoc1:srcs0:soeq0:spsa0:01}
157	\end{table}
158
159	To analyze the system depicted in Figure~\ref{fig:csoc1:srcs0:soeq0:spsa0:01},
160	first note that
161
162	\begin{equation}
163	\label{eq:csoc1:srcs0:soeq0:spsa0:01}
164	V_{ADS} = V_S
165	\end{equation}
166
167	\noindent{}and
168
169	\begin{equation}
170	\label{eq:csoc1:srcs0:soeq0:spsa0:02}
171	V_{ADP} = \alpha V_S.
172	\end{equation}
173
174	For simplicity of analysis, we assume that A/D converters quantize by
175	truncation, so that
176
177	\begin{equation}
178	\label{eq:csoc1:srcs0:soeq0:spsa0:03}
179	N_{ADS} = \lfloor V_S r_{ADS} \rfloor
180	\end{equation}
181
182	\noindent{}and
183
184	\begin{equation}
185	\label{eq:csoc1:srcs0:soeq0:spsa0:04}
186	N_{ADP} = \lfloor \alpha V_S r_{ADP} \rfloor.
187	\end{equation}
188
189	\noindent{}The assumption that A/D converters quantize by truncation
190	has little effect on the error analysis of practical systems. (Need
191	to include an exercise to show this.)
192
193	To aid in symbolic manipulation, we also introduce
194	$\overline{N_{ADS}}$ and $\overline{N_{ADP}}$, which are
195	$N_{ADS}$ and $N_{ADP}$, respectively,
196	without quantization error:
197
198	\begin{equation}
199	\label{eq:csoc1:srcs0:soeq0:spsa0:03b}
200	\overline{N_{ADS}} = V_S r_{ADS}
201	\end{equation}
202
203	\begin{equation}
204	\label{eq:csoc1:srcs0:soeq0:spsa0:04b}
205	\overline{N_{ADP}} = \alpha V_S r_{ADP}
206	\end{equation}
207
208	If quantization were not present (i.e. if Eqns.
209	\ref{eq:csoc1:srcs0:soeq0:spsa0:03}
210	and
211	\ref{eq:csoc1:srcs0:soeq0:spsa0:04}
212	did not include floor functions), the potentiometer wiper position
213	$\alpha$ could be calculated exactly as:
214
215	\begin{equation}
216	\label{eq:csoc1:srcs0:soeq0:spsa0:05}
217	\alpha = \frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}} r_{ADP}}.
218	\end{equation}
219
220	Based on (\ref{eq:csoc1:srcs0:soeq0:spsa0:05}),
221	it makes sense to calculate $\overline{\alpha}$, the
222	estimate of $\alpha$, as:
223
224	\begin{equation}
225	\label{eq:csoc1:srcs0:soeq0:spsa0:05b}
226	\overline{\alpha}
227	=
228	\frac{N_{ADP} r_{ADS}}{N_{ADS} r_{ADP}}.
229	\end{equation}
230
231	The question that must be posed is:
232	\emph{How different from $\alpha$ can $\overline{\alpha}$ be?}.
233	We seek to bound $\|\overline{\alpha}-\alpha\|$.
234
235	Quantization can be treated by noting that applying the floor function
236	to an input introduces an error $\in (-1,0]$, i.e.
237
238	\begin{equation}
239	\label{eq:csoc1:srcs0:soeq0:spsa0:06}
240	\lfloor x \rfloor = x + \varepsilon; \;\; \varepsilon \in (-1,0].
241	\end{equation}
242
243	Using this observation, we can rewrite
244	(\ref{eq:csoc1:srcs0:soeq0:spsa0:05b}) as
245
246	\begin{equation}
247	\label{eq:csoc1:srcs0:soeq0:spsa0:07}
248	\overline{\alpha}
249	=
250	\frac{N_{ADP} r_{ADS}}{N_{ADS} r_{ADP}}
251	=
252	\frac{(\overline{N_{ADP}} + \varepsilon_1) r_{ADS}}{(\overline{N_{ADS}} + \varepsilon_2) r_{ADP}} ;
253	\;\;
254	\varepsilon_1, \varepsilon_2 \in (-1, 0].
255	\end{equation}
256
257	\noindent{}It can be seen from
258	(\ref{eq:csoc1:srcs0:soeq0:spsa0:07})
259	that the minimum value of the estimate
260	$\overline{\alpha}$ occurs when $\varepsilon_1$ is minimized and
261	$\varepsilon_2$ is maximized. Similarly, the maximum
262	value occurs when $\varepsilon_1$ is maximized and
263	$\varepsilon_2$ is minimized. These observations lead to this
264	inequality:
265
266	\begin{equation}
267	\label{eq:csoc1:srcs0:soeq0:spsa0:08}
268	\frac{N_{ADP} r_{ADS}}{(N_{ADS}+1) r_{ADP}}
269	<
270	\alpha
271	<
272	\frac{(N_{ADP}+1) r_{ADS}}{r_{ADP}} .
273	\end{equation}
274
275	Intuitively, the form of (\ref{eq:csoc1:srcs0:soeq0:spsa0:08})
276	makes sense. The smallest possible value of $\alpha$ will correspond
277	to the case
278	when $N_{ADP}$ contains no quantization error but $N_{ADS}$ contains
279	a quantization error of nearly 1.
280	The largest possible value of $\alpha$ will correspond
281	to the case
282	when $N_{ADS}$ contains no quantization error but $N_{ADP}$ contains
283	a quantization error of nearly 1.
284
285	It can also be seen from (\ref{eq:csoc1:srcs0:soeq0:spsa0:08}) that
286	the interval to which $\alpha$ is confined will be larger
287	when $V_S$ is smaller (implying a smaller $N_{ADS}$ and $N_{ADP}$).
288	This is also intuitively plausible, since the quantization error
289	of up to one count in $N_{ADS}$ or $N_{ADP}$ will have a larger
290	relative significance when $N_{ADS}$ and $N_{ADP}$ are smaller.
291
292	The inequality provided in (\ref{eq:csoc1:srcs0:soeq0:spsa0:08})
293	is certainly useful, and gives insight into quantization error. However,
294	we seek an inequality that is more friendly to engineering work, i.e.
295	one that involves voltages rather than A/D counts.
296
297	Assume it is known for an application that $V_S$ can vary only over the
298	interval
299
300	\begin{equation}
301	\label{eq:csoc1:srcs0:soeq0:spsa0:08b}
302	V_S \in [V_{SMIN}, V_{SMAX}],
303	\end{equation}
304
305
306	\noindent{}and that $\alpha$ can very only over
307	the interval
308
309	\begin{equation}
310	\label{eq:csoc1:srcs0:soeq0:spsa0:08c}
311	\alpha \in [\alpha_{MIN}, \alpha_{MAX}].
312	\end{equation}
313
314	\noindent{}Furthermore, we
315	seek useful inequalities where is it \emph{not} required
316	that\footnote{(\ref{eq:csoc1:srcs0:soeq0:spsa0:09}) represents the
317	requirement that $V_{SMIN}$ or $V_{SMAX}$ represent a precisely
318	integral number of A/D
319	counts. This requirement is almost never met in practical engineering
320	work.}
321
322	\begin{equation}
323	\label{eq:csoc1:srcs0:soeq0:spsa0:09}
324	r_{ADS} \vworkdivides \{V_{SMIN},V_{SMAX}\},
325	\end{equation}
326
327	\noindent{}as if (\ref{eq:csoc1:srcs0:soeq0:spsa0:09})
328	were required, it would introduce extra complexity
329	in applying the inequality.
330
331	To develop the desired type of inequality, we can use
332	a different analysis method. Assume that
333	$r_{ADS}$ and $r_{ADP}$ are fixed. Then, introduce
334	the function
335
336	\begin{equation}
337	\label{eq:csoc1:srcs0:soeq0:spsa0:10}
338	F(\overline{N_{ADP}}, \overline{N_{ADS}})
339	=
340	\frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}} r_{ADP}},
341	\end{equation}
342
343	\noindent{}which, in accordance with (\ref{eq:csoc1:srcs0:soeq0:spsa0:05}),
344	is a perfect estimate of $\alpha$.
345
346	\begin{figure}
347	\centering
348	\Huge{TBD}
349	\caption{Sample Staircase Pattern Of Estimate $\overline{\alpha}$ Of
350	Prototype Ratiometric Conversion System I}
351	\label{fig:csoc1:srcs0:soeq0:spsa0:02}
352	\end{figure}
353
354	We can examine the staircase pattern of $\overline{\alpha}$ as
355	$V_S$ is increased (see Figure \ref{fig:csoc1:srcs0:soeq0:spsa0:02},
356	which provides an example staircase pattern). Note that the staircase
357	pattern may contain four qualitatively
358	distinct types of vertical discontinuities. In the descriptions below,
359	assume that $V_D \in [V_{SMIN}, V_{SMAX}]$ is the value of
360	$V_S$ at the discontinuity.
361
362	\begin{itemize}
363	\item \textbf{Downward overshoot discontinuities (DOD):}
364	As $V_S$ is increased, these correspond to the values
365	of $V_S$ where $V_S r_{ADS} \in \vworkintset$ but
366	$V_S \alpha r_{ADS} \notin \vworkintset$. At such
367	discontinuities,
368	$\lim_{V_S \rightarrow V_D^-}\overline{\alpha} > \alpha$,
369	but
370	$\lim_{V_S \rightarrow V_D^+}\overline{\alpha} < \alpha$.
371	\item \textbf{Upward overshoot discontinuities (UOD):}
372	As $V_S$ is increased, these correspond to the values
373	of $V_S$ where $V_S r_{ADS} \notin \vworkintset$ but
374	$V_S \alpha r_{ADS} \in \vworkintset$. At such
375	discontinuities,
376	$\lim_{V_S \rightarrow V_D^-}\overline{\alpha} < \alpha$,
377	but
378	$\lim_{V_S \rightarrow V_D^+}\overline{\alpha} > \alpha$.
379	\item \textbf{Downward exact discontinuities (DED):}
380	As $V_S$ is increased, these correspond to the values
381	of $V_S$ where $V_S r_{ADS} \in \vworkintset$ and
382	$V_S \alpha r_{ADS} \in \vworkintset$. At such
383	discontinuities,
384	$\lim_{V_S \rightarrow V_D^-}\overline{\alpha} > \alpha$,
385	but
386	$\lim_{V_S \rightarrow V_D^+}\overline{\alpha} = \alpha$.
387	\item \textbf{Upward exact discontinuities (UED):}
388	As $V_S$ is increased, these correspond to the values
389	of $V_S$ where $V_S r_{ADS} \in \vworkintset$ and
390	$V_S \alpha r_{ADS} \in \vworkintset$. At such
391	discontinuities,
392	$\lim_{V_S \rightarrow V_D^-}\overline{\alpha} < \alpha$,
393	but
394	$\lim_{V_S \rightarrow V_D^+}\overline{\alpha} = \alpha$.
395	\end{itemize}
396
397	We can place upper bounds on the magnitudes of the discontinuities
398	by examining the partial derivatives of
399	$F(\overline{N_{ADP}}, \overline{N_{ADS}})$ as specified in
400	(\ref{eq:csoc1:srcs0:soeq0:spsa0:10}), specifically:
401
402	\begin{equation}
403	\label{eq:csoc1:srcs0:soeq0:spsa0:11}
404	\frac{\partial{}F(\cdot{},\cdot{})}{\partial \overline{N_{ADS}}}
405	=
406	-
407	\frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}^2} r_{ADP}}
408	\end{equation}
409
410	\begin{equation}
411	\label{eq:csoc1:srcs0:soeq0:spsa0:11b}
412	\frac{\partial{}^2 F(\cdot{},\cdot{})}{\partial \overline{N_{ADS}}^2}
413	=
414	2
415	\frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}^3} r_{ADP}}
416	\end{equation}
417
418	\begin{equation}
419	\label{eq:csoc1:srcs0:soeq0:spsa0:11c}
420	\frac{\partial{}^i F(\cdot{},\cdot{})}{\partial \overline{N_{ADS}}^i}
421	=
422	(-1)^i (i!)
423	\frac{\overline{N_{ADP}} r_{ADS}}{\overline{N_{ADS}^{i+1}} r_{ADP}}
424	\end{equation}
425
426
427	\begin{equation}
428	\label{eq:csoc1:srcs0:soeq0:spsa0:12}
429	\frac{\partial{}F(\cdot{},\cdot{})}{\partial \overline{N_{ADP}}}
430	=
431	-
432	\frac{r_{ADS}}{\overline{N_{ADS}} r_{ADP}}
433	\end{equation}
434
435	\begin{equation}
436	\label{eq:csoc1:srcs0:soeq0:spsa0:12b}
437	\frac{\partial{}^i F(\cdot{},\cdot{})}{\partial \overline{N_{ADP}}^i}
438	=
439	0, \; i \geq 2
440	\end{equation}
441
442	A \emph{DOD} (discussed above) corresponds to the case where
443	$N_{ADS}$ increases by one count at $V_S=V_D$ without an increase in
444	$N_{ADP}$.
445
446
447	A \emph{UOD} (discussed above) corresponds to the case where
448	$N_{ADP}$ increases by one count at $V_S=V_D$ without an increase in
449	$N_{ADS}$.
450
451
452
453
454	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
455	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
456	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
457	\section{Motion Control Systems}
458
459
460	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
461	\vfill
462	\noindent\begin{figure}[!b]
463	\noindent\rule[-0.25in]{\textwidth}{1pt}
464	\begin{tiny}
465	\begin{verbatim}
466	$RCSfile: c_soc1.tex,v $
467	$Source: /home/dashley/cvsrep/e3ft_gpl01/e3ft_gpl01/dtaipubs/esrgubka/c_soc1/c_soc1.tex,v $
468	$Revision: 1.7 $
469	$Author: dtashley $
470	$Date: 2002/04/21 22:50:04 $
471	\end{verbatim}
472	\end{tiny}
473	\noindent\rule[0.25in]{\textwidth}{1pt}
474	\end{figure}
475
476	%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
477	% $Log: c_soc1.tex,v $
478	% Revision 1.7 2002/04/21 22:50:04 dtashley
479	% Safety checkin before working on laptop.
480	%
481	% Revision 1.6 2002/04/13 08:18:43 dtashley
482	% Edits from laptop.
483	%
484	% Revision 1.5 2002/04/13 06:04:32 dtashley
485	% Safety checkin before resuming work on laptop.
486	%
487	% Revision 1.4 2002/04/12 23:41:50 dtashley
488	% Safety checkin before major editorial additions.
489	%
490	% Revision 1.3 2002/04/10 06:12:33 dtashley
491	% Evening safety checkin.
492	%
493	% Revision 1.2 2002/04/09 23:32:20 dtashley
494	% Edits, preparing for addition of lists of tables and figures.
495	%
496	% Revision 1.1 2001/08/25 22:51:26 dtashley
497	% Complex re-organization of book.
498	%
499	%End of file C_PCO0.TEX